DASIP 2027: Workshop on Design and Architectures for Signal and Image Processing
In conjunction with the HiPEAC 2027 Conference in Glasgow, Scotland, 18-20 January 2027
Call for Papers Conference Proceeding

About DASIP

The Workshop on Design and Architectures for Signal and Image Processing (DASIP) provides an inspiring international forum for the latest innovations and developments in the field of leading signal, image and video processing and machine learning in custom embedded, edge and cloud computing architectures and systems.

The workshop program will include keynote speeches and contributed paper sessions.

The DASIP 2026 proceedings have been published in the Springer LNCS Series and made available on the Springer website.

Venue

The 20th Workshop on Design and Architectures for Signal and Image Processing (DASIP 2027) will take place in conjunction with the
HiPEAC 2027 conference in Glasgow, Scotland, 18-20 January 2027.

HiPEAC Logo

Important Dates

Preliminary Cycle
Abstract submission deadline: 18 August 2026
Paper submission deadline: 25 August 2026
Notification and feedbacks: 6 October 2026

Main Cycle
Abstract submission deadline: 20 October 2026
Paper submission deadline: 27 October 2026
Notification: 14 December 2026
Camera-ready submission deadline: 9 January 2027

All deadlines are for 23:59 Anywhere on Earth (AoE)

Call for Papers

Prospective authors are invited to submit manuscripts on the following topics, but not limited to them.

Custom embedded, edge and cloud architectures and systems

Machine learning and deep learning architectures for inference and training
Systems for autonomous vehicles: cars, drones, ships and space applications
Image processing and compression architectures
Smart cameras, security systems, behaviour recognition
Edge and cloud processing: special routing, configurable coprocessors and low energy considerations
Real-time cryptography, secure computing, financial and personal data processing
Computer arithmetic, approximate computing, probabilistic computing, nanocomputing, bio-inspired computing
Biological data collection and analysis, bioinformatics
Personal digital assistants, natural language processing, wearable computing and implantable devices
Global navigation satellite and inertial navigation systems

Design Methods and Tools

Design verification and fault tolerance
Embedded system security and security validation
System-level design and hardware/software co-design
High-level synthesis, logic synthesis, communication synthesis
Embedded real-time systems and real-time operating systems
Rapid system prototyping, performance analysis and estimation
Formal models, transformations, algorithm transformations and metrics

Development Platforms, Architectures and Technologies

Embedded platforms for multimedia and telecommunication
Many-core and multi-processor systems, SoCs, and NoCs
Reconfigurable ASIPs, FPGAs, and dynamically reconfigurable systems
Memory system and cache management
Asynchronous (self-timed) circuits and analog and mixed-signal circuits

Authors Information

Two-cycle Submission Process

Two submission deadlines are proposed: One for the preliminary cycle, and one for the main cycle.
Papers must follow the same subsequently described submission guidelines for both cycles.
However, papers rejected in the preliminary cycle can be resubmitted during the main cycle, allowing authors to take advantage of the reviews.
Acceptance in the preliminary cycle result in automatic acceptance in the main cycle, no more action required.

Submission Guidelines

Authors should prepare their full papers (up to 12 pages) in single-column format (further details will be available ASAP). There is no short paper track.

Submitted papers are required to describe original unpublished work and must not be under consideration for publication elsewhere. Submissions must be fully anonymous, but authors should not hide previous work, instead, they need to make self-references in the third person.

Each submission will receive at least three independent double-blind reviews from the members of the scientific committee. Authors are encouraged to take the reviewers’ comments into account when preparing the final versions of their papers and present the research during the workshop.

All accepted papers must be presented by one of the authors in order to be included in the workshop proceedings.

Paper Submission

Registration

DASIP 2027 is a HiPEAC-based workshop. Hence, a registration at HiPEAC is required.

Please be aware that for each accepted paper, at least one of the authors must pay the full registration fee in order for the paper to be included in the workshop proceedings and scheduled in the program.

Distinguished Speakers

Program

Committees

Chairs

Giulio Rossolini
Scuola Superiore Sant’Anna
Pisa, Italy
Giulio.Rossolini@santannapisa.it

Claudio Rubattu
University of Sassari
Sassari, Italy
crubattu@uniss.it

Steering Committee

João M. P. Cardoso
University of Porto, Portugal

Miguel Chavarrías
Universidad Politécnica de Madrid, Spain

Jean-Pierre David
Ecole Polytechnique de Montreal, Canada

Karol Desnos
INSA Rennes - IETR laboratory, France

Diana Goehringer
TU Dresden, Germany

Marek Gorgoń
AGH University of Krakow, Poland

Michael Huebner
Brandenburg University of Technology, Cottbus-Senftenberg, Germany

Marcin Kowalczyk
AGH University of Kraków, Poland

Tomasz Kryjak
AGH University of Krakow, Poland

Paolo Meloni
University of Cagliari, Cagliari, Italy

Camille Monière
Lab-STICC / University Bretagne Sud, France

Sergio Pertuz
TU Dresden, Germany

Sebastien Pillement
University of Nantes - IETR, France

Andrea Pinna
Sorbonne University, France

Alfonso Rodríguez
Universidad Politécnica de Madrid, Spain

Technical Program Committee

Prior Editions

DASIP is a long-running annual workshop open to the presentation and discussion of the latest innovations and developments in the field of leading signal, image and video processing and machine learning in custom embedded, edge and cloud computing architectures and systems.

It was organized for the first time in 2007 in Grenoble, France, and since then it has alternated between several countries in Europe and Canada. The last five editions were co-located with HiPEAC. Since 2022, it was published in the Springer LNCS series as seen on the Springer conference website.



  • polish flag

    DASIP 2026

    In conjunction with the 21st HiPEAC Conference
    Kraków, Poland
    January 26-28
    Website

  • spanish flag

    DASIP 2025

    In conjunction with the 20th HiPEAC Conference
    Barcelona, Spain
    January 20-21
    Website

  • german flag

    DASIP 2024

    In conjunction with the 19th HiPEAC Conference
    Munich, Germany
    January 17-19
    Website

  • french flag

    DASIP 2023

    In conjunction with the 18th HiPEAC Conference
    Toulouse, France
    January 16-18
    Website

  • hungarian flag

    DASIP 2022

    In conjunction with the 17th HiPEAC Conference
    Budapest, Hungary
    June 20-22
    Website

  • A laptop with four silouhetes in a split screen

    DASIP 2021

    In conjunction with the 16th HiPEAC Conference
    Virtual Conference, Online
    January 18-20
    Website

  • canadian flag

    DASIP 2019

    Polytechnique Montréal, Canada
    October 16-18
    Website

  • portuguese flag

    DASIP 2018

    University of Porto, Portugal
    October 10-12
    Website

  • german flag

    DASIP 2017

    Technical University of Dresden, Germany
    September 27-29

  • french flag

    DASIP 2016

    RISA/INRIA Rennes, France
    October 12-14

  • polish flag

    DASIP 2015

    AGH University of Science and Technology, Poland
    September 23-25

  • spanish flag

    DASIP 2014

    Technical University of Madrid, Spain
    October 8-10

  • italian flag

    DASIP 2013

    University of Cagliari, Italy
    October 8-10

  • german flag

    DASIP 2012

    Karlsruhe Institute of Technology, Germany
    October 23-25

  • finnish flag

    DASIP 2011

    Tampere University of Technology, Finland
    November 2-4

  • United-Kingdom's flag

    DASIP 2010

    University of Edinburgh, UK
    October 26-28

  • french flag

    DASIP 2009

    Sophia Antipolis, France
    September 22-24

  • belge flag

    DASIP 2008

    Brussels, Belgium
    November 24

  • french flag

    DASIP 2007

    Grenoble, France
    November 27-29

Sponsors

Zulip Logo, a stylised Z in a blue circle